Intel Pentium Instruction Set Reference
CLTS - Clear Task-Switched Flag in CR0
| Code |
Mnemonic |
Description |
| 0F 06 |
CLTS |
Clears TS flag in CR0 |
Description
Clears the task-switched (TS) flag in the CR0 register. This instruction is intended for use in operating-system procedures. It is a privileged instruction that can only be executed at a CPL of 0. It is allowed to be executed in real-address mode to allow initialization for protected mode.
The processor sets the TS flag every time a task switch occurs. The flag is used to synchronize the saving of FPU context in multitasking applications. See the description of the TS flag in the section titled "Control Registers" in Chapter 2 of the Intel Architecture Software Developer's Manual, Volume 3, for more information about this flag.
| Operands |
Bytes |
Clocks |
| |
2 |
10 |
NP |
Flags
| ID |
unaffected |
DF |
unaffected |
| VIP |
unaffected |
IF |
unaffected |
| VIF |
unaffected |
TF |
unaffected |
| AC |
unaffected |
SF |
unaffected |
| VM |
unaffected |
ZF |
unaffected |
| RF |
unaffected |
AF |
unaffected |
| NT |
unaffected |
PF |
unaffected |
| IOPL |
unaffected |
CF |
unaffected |
| OF |
unaffected |