Code | Mnemonic | Description |
---|---|---|
61 | POPA | Pop DI, SI, BP, BX, DX, CX, and AX |
61 | POPAD | Pop EDI, ESI, EBP, EBX, EDX, ECX, and EAX |
Pops doublewords (POPAD) or words (POPA) from the stack into the general-purpose registers. The registers are loaded in the following order: EDI, ESI, EBP, EBX, EDX, ECX, and EAX (if the operand-size attribute is 32) and DI, SI, BP, BX, DX, CX, and AX (if the operand-size attribute is 16). (These instructions reverse the operation of the PUSHA/PUSHAD instructions.) The value on the stack for the ESP or SP register is ignored. Instead, the ESP or SP register is incremented after each register is loaded.
The POPA (pop all) and POPAD (pop all double) mnemonics reference the same opcode. The POPA instruction is intended for use when the operand-size attribute is 16 and the POPAD instruction for when the operand-size attribute is 32. Some assemblers may force the operand size to 16 when POPA is used and to 32 when POPAD is used (using the operand-size override prefix [66H] if necessary). Others may treat these mnemonics as synonyms (POPA/POPAD) and use the current setting of the operand-size attribute to determine the size of values to be popped from the stack, regardless of the mnemonic used. (The D flag in the current code segment's segment descriptor determines the operand-size attribute.)
Operands | Bytes | Clocks | |
---|---|---|---|
popa | 1 | 5 | NP |
popad | 1 | 5 | NP |
POPA = POP DI, SI, BP, SP, BX, DX, CX, AX
POPAD = POP EDI, ESI, EBP, ESP, EBX, EDX, ECX, EAX
(SP and ESP are discarded)
ID | unaffected | DF | unaffected |
---|---|---|---|
VIP | unaffected | IF | unaffected |
VIF | unaffected | TF | unaffected |
AC | unaffected | SF | unaffected |
VM | unaffected | ZF | unaffected |
RF | unaffected | AF | unaffected |
NT | unaffected | PF | unaffected |
IOPL | unaffected | CF | unaffected |
OF | unaffected |