Intel Pentium Instruction Set Reference
TEST - Logical Compare
| Code |
Mnemonic |
Description |
| A8 ib |
TEST AL, imm8 |
AND imm8 with AL; set SF, ZF, PF according to result |
| A9 iw |
TEST AX, imm16 |
AND imm16 with AX; set SF, ZF, PF according to result |
| A9 id |
TEST EAX, imm32 |
AND imm32 with EAX; set SF, ZF, PF according to result |
| F6 /0 ib |
TEST r/m8, imm8 |
AND imm8 with r/m8; set SF, ZF, PF according to result |
| F7 /0 iw |
TEST r/m16, imm16 |
AND imm16 with r/m16; set SF, ZF, PF according to result |
| F7 /0 id |
TEST r/m32, imm32 |
AND imm32 with r/m32; set SF, ZF, PF according to result |
| 84 / r |
TEST r/m8, r8 |
AND r8 with r/m8; set SF, ZF, PF according to result |
| 85 / r |
TEST r/m16, r16 |
AND r16 with r/m16; set SF, ZF, PF according to result |
| 85 / r |
TEST r/m32, r32 |
AND r32 with r/m32; set SF, ZF, PF according to result |
Description
Computes the bit-wise logical AND of first operand (source 1 operand) and the second operand (source 2 operand) and sets the SF, ZF, and PF status flags according to the result. The result is then discarded.
| Operands |
Bytes |
Clocks |
| reg, reg |
2 |
1 |
UV |
| mem, reg |
2 + d(0, 2) |
2 |
UV |
| reg, mem |
2 + d(0, 2) |
2 |
UV |
| reg, imm |
2 + i(1, 2) |
1 |
UV |
| mem, imm |
2 + d(0, 2) + i(1, 2) |
2 |
UV ( not pairable if there is a displacement and immediate) |
| acc, imm |
1 + i(1, 2) |
1 |
UV |
Flags
| ID |
unaffected |
DF |
unaffected |
| VIP |
unaffected |
IF |
unaffected |
| VIF |
unaffected |
TF |
unaffected |
| AC |
unaffected |
SF |
sets according to the result (see the "Operation" section above) |
| VM |
unaffected |
ZF |
sets according to the result (see the "Operation" section above) |
| RF |
unaffected |
AF |
undefined |
| NT |
unaffected |
PF |
sets according to the result (see the "Operation" section above) |
| IOPL |
unaffected |
CF |
cleared to 0 |
| OF |
cleared to 0 |